Closing the Power Gap Between ASIC & Custom

1. Introduction
David Chinnery, Kurt Keutzer

2. Overview of the Factors Affecting the Power Consumption
David Chinnery, Kurt Keutzer

3. Pipelining to Reduce the Power
David Chinnery, Kurt Keutzer

4. Voltage Scaling
David Chinnery, Kurt Keutzer

5. Methodology to Optimize Energy of Computation for SOCs
Jagesh Sanghavi, Eliot Gerstner

6. Linear Programming for Gate Sizing
David Chinnery, Kurt Keutzer

7. Linear Programming for Multi-Vth and Multi-Vdd Assignment
David Chinnery, Kurt Keutzer

8. Power Optimization using Multiple Supply Voltages
Sarvesh Kulkarni, Ashish Srivastava, Dennis Sylvester, David Blaauw

9. Placement for Power Optimization
Ameya R. Agnihotri, Satoshi Ono, Patrick H. Madden

10. Power Gating Design Automation
Jerry Frenkil, Srini Venkatraman

11. Verification For Multiple Supply Voltage Designs
Barry Pangrle, Srikanth Jadcherla

12. Winning the Power Struggle in an Uncertain Era
Murari Mani, Michael Orshansky

13. Pushing ASIC Performance in a Power Envelope
Leon Stok, Ruchir Puri, Subhrajit Bhattacharya, John Cohn, Dennis Sylvester, Ashish Srivastava, Sarvesh Kulkarni

14. Low Power ARM 1136JF-S Design
George Kuo, Anand Iyer

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