Dynamically Reconfigurable Systems

1. Development and Synthesis of Adaptive Multi-grained Reconfigurable Hardware Architecture for Dynamic Function Patterns
Alexander Thomas, Jürgen Becker

2. Reconfigurable Components forApplication-Specific Processor Architectures
Tobias G. Noll, Thorsten Sydow, Bernd Neumann, Jochen Schleifer, Thomas Coenen, Götz Kappen

3. Erlangen Slot Machine: An FPGA-Based Dynamically Reconfigurable Computing Platform
Josef Angermeier, Christophe Bobda, Mateusz Majer, Jürgen Teich

4. Models and Algorithms for Hyperreconfigurable Hardware
Sebastian Lange, Martin Middendorf

5. Evaluation and Design Methods forProcessor-Like Reconfigurable Architectures
Sven Eisenhardt, Thomas Schweizer, Julio OliveiraFilho, Tommy Kuhn, Wolfgang Rosenstiel

6. Adaptive Computing Systems and Their Design Tools
Andreas Koch

7.
PolyDyn—Object-Oriented Modelling and Synthesis Targeting Dynamically Reconfigurable FPGAs
Andreas Schallenberg, Wolfgang Nebel, Andreas Herrholz, Philipp A. Hartmann, Kim Grüttner, Frank Oppenheimer

8. Design Methods and Tools for Improved Partial Dynamic Reconfiguration
Markus Rullmann, Renate Merker

9. Dynamic Partial Reconfiguration by Means ofAlgorithmic Skeletons—A Case Study
Norma Montealegre, Franz J. Rammig

10. ReCoNodes—Optimization Methods for Module Scheduling and Placement on Reconfigurable Hardware Devices
Ali Ahmadinia, Josef Angermeier, Sándor P. Fekete, Tom Kamphans, Dirk Koch, Mateusz Majer, Nils Schweer, Jürgen Teich, Christopher Tessars, Jan C. Veen

11. ReCoNets—Design Methodology for Embedded Systems Consisting of Small Networks ofReconfigurable Nodes and Connections
Christian Haubelt, Dirk Koch, Felix Reimann, Thilo Streichert, Jürgen Teich

12. Adaptive Runtime System with Intelligent Allocation of Dynamically Reconfigurable Function Model and Optimized Interface Topologies
Lars Braun, Tobias Schwalb, Philipp Graf, Michael Hübner, Michael Ullmann, K. D. Müller-Glaser, Jürgen Becker

13. ReconOS: An Operating System forDynamically Reconfigurable Hardware
Enno Lübbers, Marco Platzner

14. FlexiChaP: A Dynamically Reconfigurable ASIP for Channel Decoding for Future Mobile Systems
Matthias Alles, Timo Vogt, Christian Brehm, Norbert Wehn

15. Dynamically Reconfigurable Systems forWireless Sensor Networks
Heiko Hinkelmann, Peter Zipf, Manfred Glesner

16. DynaCORE—Dynamically Reconfigurable Coprocessor for Network Processors
Carsten Albrecht, Jürgen Foag, Roman Koch, Erik Maehle, Thilo Pionteck

17. FlexPath NP—Flexible, Dynamically Reconfigurable Processing Paths in Network Processors
Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf

18. AutoVision—Reconfigurable Hardware Acceleration for Video-Based Driver Assistance
Christopher Claus, Walter Stechele

19. Procedures for Securing ECC Implementations Against Differential Power Analysis Using Reconfigurable Architectures
Marc Stöttinger, Felix Madlener, Sorin A. Huss

20. Reconfigurable Controllers—A Mechatronic Systems Approach
Roland Kasper, Steffen Toscher

Avainsanat: Engineering, Circuits and Systems, Programming Languages, Compilers, Interpreters, Processor Architectures