New Data Structures and Algorithms for Logic Synthesis and Verification

1. Introduction
Luca Gaetano Amaru

Part I. Logic Representation, Manipulation and Optimization

2. Biconditional Logic
Luca Gaetano Amaru

3. Majority Logic
Luca Gaetano Amaru

Part II. Logic Satisfiability and Equivalence Checking

4. Exploiting Logic Properties to Speedup SAT
Luca Gaetano Amaru

5. Majority Normal Form Representation and Satisfiability
Luca Gaetano Amaru

6. Improvements to the Equivalence Checking of Reversible Circuits
Luca Gaetano Amaru

7. Conclusions
Luca Gaetano Amaru

Avainsanat: Engineering, Circuits and Systems, Processor Architectures, Logic Design