Horta, Nuno
Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
1. Introduction
Nuno Lourenço, Ricardo Martins, Nuno Horta
2. Previous Works on Automatic Analog IC Sizing
Nuno Lourenço, Ricardo Martins, Nuno Horta
3. AIDA-C Architecture
Nuno Lourenço, Ricardo Martins, Nuno Horta
4. Multi-objective Optimization Kernel
Nuno Lourenço, Ricardo Martins, Nuno Horta
5. AIDA-C Circuit Sizing Results
Nuno Lourenço, Ricardo Martins, Nuno Horta
6. Layout-Aware Circuit Sizing
Nuno Lourenço, Ricardo Martins, Nuno Horta
7. AIDA-C Layout-Aware Circuit Sizing Results
Nuno Lourenço, Ricardo Martins, Nuno Horta
8. Conclusions
Nuno Lourenço, Ricardo Martins, Nuno Horta
Avainsanat: Engineering, Circuits and Systems, Processor Architectures, Electronics and Microelectronics, Instrumentation
- Tekijä(t)
- Horta, Nuno
- Lourenço, Nuno
- Martins, Ricardo
- Julkaisija
- Springer
- Julkaisuvuosi
- 2017
- Kieli
- en
- Painos
- 1
- Sivumäärä
- 27 sivua
- Kategoria
- Tekniikka, energia, liikenne
- Tiedostomuoto
- E-kirja
- eISBN (PDF)
- 9783319420370
- Painetun ISBN
- 978-3-319-42036-3