Advanced Techniques in Logic Synthesis, Optimizations and Applications

1. Introduction
Sunil P. Khatri, Kanupriya Gulati

2. Logic Synthesis by Signal-Driven Decomposition
Anna Bernasconi, Valentina Ciriani, Gabriella Trucco, Tiziano Villa

3. Sequential Logic Synthesis Using Symbolic Bi-decomposition
Victor N. Kravets, Alan Mishchenko

4. Boolean Factoring and Decomposition of Logic Networks
Robert Brayton, Alan Mishchenko, Satrajit Chatterjee

5. Ashenhurst Decomposition Using SAT and Interpolation
Hsuan-Po Lin, Jie-Hong Roland Jiang, Ruei-Rung Lee

6. Bi-decomposition Using SAT and Interpolation
Ruei-Rung Lee, Jie-Hong Roland Jiang, Wei-Lun Hung

7. Boundary Points and Resolution
Eugene Goldberg, Panagiotis Manolios

8. SAT Sweeping with Local Observability Don’t-Cares
Qi Zhu, Nathan B. Kitchen, Andreas Kuehlmann, Alberto Sangiovanni-Vincentelli

9. A Fast Approximation Algorithm for MIN-ONE SAT and Its Application on MAX-SAT Solving
Lei Fang, Michael S. Hsiao

10. Algorithms for Maximum Satisfiability Using Unsatisfiable Cores
Joao Marques-Sila, Jordi Planes

11. Simulation and SAT-Based Boolean Matching for Large Boolean Networks
Kuo-Hua Wang, Chung-Ming Chan, Jung-Chang Liu

12. Logic Difference Optimization for Incremental Synthesis
Smita Krishnaswamy, Haoxing Ren, Nilesh Modi, Ruchir Puri

13. Large-Scale Boolean Matching
Hadi Katebi, Igor Markov

14. Algebraic Techniques to Enhance Common Sub-expression Extraction for Polynomial System Synthesis
Sivaram Gopalakrishnan, Priyank Kalla

15. Automated Logic Restructuring with aSPFDs
Yu-Shen Yang, Subarna Sinha, Andreas Veneris, Robert Brayton, Duncan Smith

16. Extracting Functions from Boolean Relations Using SAT and Interpolation
Jie-Hong Roland Jiang, Hsuan-Po Lin, Wei-Lun Hung

17. A Robust Window-Based Multi-node Minimization Technique Using Boolean Relations
Jeff L. Cobb, Kanupriya Gulati, Sunil P. Khatri

18. Synthesizing Combinational Logic to Generate Probabilities: Theories and Algorithms
Weikang Qian, Marc D. Riedel, Kia Bazargan, David J. Lilja

19. Probabilistic Error Propagation in a Logic Circuit Using the Boolean Difference Calculus
Nasir Mohyuddin, Ehsan Pakbaznia, Massoud Pedram

20. Digital Logic Using Non-DC Signals
Kalyana C. Bollapalli, Sunil P. Khatri, Laszlo B. Kish

21. Improvements of Pausible Clocking Scheme for High-Throughput and High-Reliability GALS Systems Design
Xin Fan, Miloš Krstić, Eckhard Grass

Avainsanat: Engineering, Circuits and Systems, Computer-Aided Engineering (CAD, CAE) and Design