Designing Reliable and Efficient Networks on Chips

1. Introduction
Srinivasan Murali

Part I. NoC Design Methods

2. Designing Crossbar Based Systems
Srinivasan Murali

3. Netchip Tool Flow for NoC Design
Srinivasan Murali

4. Designing Standard Topologies
Srinivasan Murali

5. Designing Custom Topologies
Srinivasan Murali

6. Supporting Multiple Applications
Srinivasan Murali

7. Supporting Dynamic Application Patterns
Srinivasan Murali

Part II. NoC Reliability Mechanisms

8. Timing-Error Tolerant NoC Design
Srinivasan Murali

9. Analysis of NoC Error Recovery Schemes
Srinivasan Murali

10. Fault-Tolerant Route Generation
Srinivasan Murali

11. NoC Support for Reliable On-Chip Memories
Srinivasan Murali

12. Conclusions and Future Directions
Srinivasan Murali

Avainsanat: Engineering, Circuits and Systems, Processor Architectures