Algorithm-Architecture Matching for Signal and Image Processing

1. Lossless Multi-Mode Interband Image Compression and Its Hardware Architecture
Xiaolin Chen, Nishan Canagarajah, Jose L. Nunez-Yanez

2. Efficient Memory Management for Uniform and Recursive Grid Traversal
Tomasz Toczek, Stéphane Mancini

3. Mapping a Telecommunication Application on aMultiprocessor System-on-Chip
Daniela Genius, Etienne Faure, Nicolas Pouillon

4. A Standard 3.5T CMOS Imager Including aLight Adaptive System for Integration Time Optimization
Gilles Sicard, Estelle Labonne, Robin Rolland

5. Approximate Multiplication and Division forArithmetic Data Value Speculation in aRISC Processor
Daniel R. Kelly, Braden J. Phillips, Said Al-Sarawi

6. RANN: A Reconfigurable Artificial Neural Network Model for Task Scheduling onReconfigurable System-on-Chip
Daniel Chillet, Sébastien Pillement, Olivier Sentieys

7. A New Three-Level Strategy for Off-Line Placement of Hardware Tasks on Partially and Dynamically Reconfigurable Hardware
Ikbel Belaid, Fabrice Muller, Maher Benjemaa

8. End-to-End Bitstreams Repository Hierarchy forFPGA Partially Reconfigurable Systems
Jérémie Crenne, Pierre Bomel, Guy Gogniat, Jean-Philippe Diguet

9. SystemC Multiprocessor RTOS Model for Services Distribution on MPSoC Platforms
Benoît Miramond, Emmanuel Huck, Thomas Lefebvre, François Verdier

10. A List Scheduling Heuristic with New Node Priorities and Critical Child Technique for Task Scheduling with Communication Contention
Pengcheng Mu, Jean-François Nezan, Mickaël Raulet

11. Multiprocessor Scheduling of Dataflow Programs within the Reconfigurable Video Coding Framework
Jani Boutellier, Christophe Lucarz, Victor Martin Gomez, Marco Mattavelli, Olli Silvén

12. A High Level Synthesis Flow Using Model Driven Engineering
Sebastien Le Beux, Laurent Moss, Philippe Marquet, Jean-Luc Dekeyser

13. Generation of Hardware/Software Systems Based on CAL Dataflow Description
Richard Thavot, Romuald Mosqueron, Julien Dubois, Marco Mattavelli

Keywords: Engineering, Signal, Image and Speech Processing, Processor Architectures, Algorithms