Finite State Machine Logic Synthesis for Complex Programmable Logic Devices

1. Introduction
Robert Czerwinski, Dariusz Kania

2. Definitions and Basic Properties
Robert Czerwinski, Dariusz Kania

3. Synthesis of FSMs
Robert Czerwinski, Dariusz Kania

4. State Assignment Algorithms
Robert Czerwinski, Dariusz Kania

5. Area Optimization Based on Graphs of Outputs
Robert Czerwinski, Dariusz Kania

6. Speed Optimization Using Tri-state Output Buffers
Robert Czerwinski, Dariusz Kania

7. Complex Strategies for FSMs
Robert Czerwinski, Dariusz Kania

8. Experiments
Robert Czerwinski, Dariusz Kania

9. Conclusions
Robert Czerwinski, Dariusz Kania

Keywords: Engineering, Circuits and Systems, Logic Design, Engineering Design