Buccella, Pietro
Parasitic Substrate Coupling in High Voltage Integrated Circuits
1. Overview of Parasitic Substrate Coupling
Pietro Buccella, Camillo Stefanucci, Maher Kayal, Jean-Michel Sallese
2. Design Challenges in High-Voltage ICs
Pietro Buccella, Camillo Stefanucci, Maher Kayal, Jean-Michel Sallese
3. Substrate Modeling with Parasitic Transistors
Pietro Buccella, Camillo Stefanucci, Maher Kayal, Jean-Michel Sallese
4. TCAD Validation of the Model
Pietro Buccella, Camillo Stefanucci, Maher Kayal, Jean-Michel Sallese
5. Extraction Tool for the Substrate Network
Pietro Buccella, Camillo Stefanucci, Maher Kayal, Jean-Michel Sallese
6. Parasitic Bipolar Transistors in Benchmark Structures
Pietro Buccella, Camillo Stefanucci, Maher Kayal, Jean-Michel Sallese
7. Substrate Coupling Analysis and Evaluation of Protection Strategies
Pietro Buccella, Camillo Stefanucci, Maher Kayal, Jean-Michel Sallese
Keywords: Engineering, Circuits and Systems, Electronic Circuits and Devices, Electronics and Microelectronics, Instrumentation
- Author(s)
- Buccella, Pietro
- Kayal, Maher
- Sallese, Jean-Michel
- Stefanucci, Camillo
- Publisher
- Springer
- Publication year
- 2018
- Language
- en
- Edition
- 1
- Series
- Analog Circuits and Signal Processing
- Page amount
- 17 pages
- Category
- Technology, Energy, Traffic
- Format
- Ebook
- eISBN (PDF)
- 9783319743820
- Printed ISBN
- 978-3-319-74381-3
