Login

Mehta, Ashok B.

ASIC/SoC Functional Design Verification

Mehta, Ashok B. - ASIC/SoC Functional Design Verification, ebook

133,75€

Ebook, PDF with Adobe DRM
ISBN: 9783319594187
DRM Restrictions

PrintingNot allowed
Copy to clipboardNot allowed

Table of contents

1. Introduction
Ashok B. Mehta

2. Functional Verification: Challenges and Solutions
Ashok B. Mehta

3. SystemVerilog Paradigm
Ashok B. Mehta

4. UVM (Universal Verification Methodology)
Ashok B. Mehta

5. Constrained Random Verification (CRV)
Ashok B. Mehta

6. SystemVerilog Assertions (SVA)
Ashok B. Mehta

7. SystemVerilog Functional Coverage (SFC)
Ashok B. Mehta

8. Clock Domain Crossing (CDC) Verification
Ashok B. Mehta

9. Low-Power Verification
Ashok B. Mehta

10. Static Verification (Formal-Based Technologies)
Ashok B. Mehta

11. ESL (Electronic System Level) Verification Methodology
Ashok B. Mehta

12. Hardware/Software Co-verification
Ashok B. Mehta

13. Analog/Mixed Signal (AMS) Verification
Ashok B. Mehta

14. SoC Interconnect Verification
Ashok B. Mehta

15. The Complete Product Design Life Cycle
Ashok B. Mehta

16. Voice Over IP (VoIP) Network SoC Verification
Ashok B. Mehta

17. Cache Memory Subsystem Verification: UVM Agent Based
Ashok B. Mehta

18. Cache Memory Subsystem Verification: ISS Based
Ashok B. Mehta

Keywords: Engineering, Circuits and Systems, Processor Architectures, Logic Design

Author(s)
Publisher
Springer
Publication year
2018
Language
en
Edition
1
Page amount
31 pages
Category
Technology, Energy, Traffic
Format
Ebook
eISBN (PDF)
9783319594187
Printed ISBN
978-3-319-59417-0

Similar titles