Testing of Interposer-Based 2.5D Integrated Circuits

1. Introduction
Ran Wang, Krishnendu Chakrabarty

2. Pre-bond Testing of the Silicon Interposer
Ran Wang, Krishnendu Chakrabarty

3. Post-bond Scan-Based Testing of Interposer Interconnects
Ran Wang, Krishnendu Chakrabarty

4. Test Architecture and Test-Path Scheduling
Ran Wang, Krishnendu Chakrabarty

5. Built-In Self-Test
Ran Wang, Krishnendu Chakrabarty

6. ExTest Scheduling and Optimization
Ran Wang, Krishnendu Chakrabarty

7. A Programmable Method for Low-Power Scan Shift in SoC Dies
Ran Wang, Krishnendu Chakrabarty

8. Conclusions
Ran Wang, Krishnendu Chakrabarty

Keywords: Engineering, Circuits and Systems, Processor Architectures, Logic Design