Simulation of Semiconductor Processes and Devices 2007

1. Nanomanufacturing Technology and Opportunities Through Physically-Based Simulation
Mark R. Pinto

2. Atomistic Modeling of Defect Diffusion in SiGe
P. Castrillo, R. Pinacho, J. E. Rubio, L. M. Vega, M. Jaraiz

3. Diffusion and Deactivation of As in Si: Combining Atomistic and Continuum Simulation Approaches
A. Martinez-Limia, C. Steen, P. Pichler, N. Gupta, W. Windl, S. Paul, W. Lerch

4. Molecular Dynamics Modeling of Octadecaborane Implantation into Si
Luis A. Marqués, L. Pelaz, I. Santos, P. López, M. Aboy

5. High Performance, Strained-Ge, Heterostructure p-MOSFETs
Tejas Krishnamohan, Donghyun Kim, Christoph Jungemann, Anh-Tuan Pham, Bernd Meinerzhagen, Yoshio Nishi, Krishna C. Saraswat

6. Strain Induced Drain-Current Enhancement Mechanism in Short-Channel Bulk Ge-pMOSFETs with Different Channel and Surface Orientations
Hiroshi Takeda, Takeo Ikezawa, Michihito Kawada, Masami Hane

7. Validation of the Effect of Full Stress Tensor in Hole Transport in Strained 65nm-Node pMOSFETs
E. Tsukuda, Y. Kamakura, H. Takashino, T. Okagaki, T. Uchida, T. Hayashi, M. Tanizawa, K. Eikyu, S. Wakahara, K. Ishikawa, O. Tsuchiya, Y. Inoue, K. Taniguchi

8. Modeling and Characterization of Advanced Phosphorus Ultra Shallow Junction Using Germanium and Carbon Coimplants
L. P. Huang, K. C. Ku, Y. M. Sheu, C. F. Nieh, C. H. Chen, H. Chang, L. T. Wang, T. L. Lee, C. C. Wang, Carlos H. Diaz

9. Intrinsic Stress Build-Up During Volmer-Weber Crystal Growth
H. Ceric, A. Nentchev, E. Langer, S. Selberherr

10. Strain Energy Driven and Curvature Driven Grain Boundary Migration in 3D-IC Cu Vias
Chaffra A. Awo-Affouda, Max O. Bloomfield, Timothy S. Cale

11. Modeling of Re-Sputtering Induced Bridge of Tungsten Bit-Lines for NAND Flash Memory Cell with 37nm Node Technology
Byungjoon Hwang, Yero Lee, Jeong-Guk Min, Hwakyung Shin, Namsu Lim, Sungjin Kim, Won-Young Chung, Tai-Kyung Kim, Jang-Ho Park, Yun-Kyoung Lee, Donghwa Kwak, Jaekwan Park, Won-Seong Lee

12. Efficient Mask Design for Inverse Lithography Technology Based on 2D Discrete Cosine Transformation (DCT)
Jinyu Zhang, Wei Xiong, Min-Chun Tsai, Yan Wang, Zhiping Yu

13. Modeling of Deep Reactive Ion Etching in a Three-Dimensional Simulation Environment
Andreas Hössinger, Zoran Djuri?, Artem Babayan

14. Comparison of Monte Carlo Transport Models for Nanometer-Size MOSFETs
C. Fiegna, M. Braccioli, S. C. Brugger, F. M. Bufler, P. Dollfus, V. Aubry-Fortuna, C. Jungemann, B. Meinerzhagen, P. Palestri, S. Galdin-Retailleau, E. Sangiorgi, A. Schenk, L. Selmi

15. Surface Roughness Scattering in Ultrathin-Body SOI MOSFETs
Seonghoon Jin, Massimo V. Fischetti, Ting-wei Tang

16. Pearson Effective Potential vs. Multi-Subband Monte-Carlo Simulation for Electron Transport in DG nMOSFETs
M. -A. Jaud, S. Barraud, J. Saint-Martin, A. Bournel, P. Dollfus, H. Jaouen

17. Inclusion of the Pauli Principle in the Langevin-Boltzmann Equation for Bulk Systems
C. Jungemann

18. Energy Conservation in Collisional Broadening
Z. Aksamija, U. Ravaioli

19. A Simple Technique for the Monte Carlo Simulation of Transport in Quantum Wells
Jongchol Kim, Chia-Yu Chen, Robert W. Dutton

20. Upcoming Challenges for Process Modeling
P. Pichler

21. Physics-Based Simulation of 1/f Noise in MOSFETs under Large-Signal Operation
Sung-Min Hong, Hong-Hyun Park, Chan Hyeong Park, Myoung Jin Lee, Hong Shick Min, Young June Park

22. Thin Body Effects to Suppress Random Dopant Fluctuations in Nano-Scaled MOSFETs
Y. Ashizawa, H. Oka

23. ‘Atomistic’ Mesh Generation for the Simulation of Semiconductor Devices
M. Aldegunde, A. J. García-Loureiro, P. V. Sushko, A. L. Shluger, K. Kalna, A. Asenov

24. Line Edge and Gate Interface Roughness Simulations of Advanced VLSI SOI-MOSFETs
T. Herrmann, W. Klix, R. Stenzel, S. Duenkel, R. Illgen, J. Hoentschel, T. Feudel, M. Horstmann

25. Impact of Shear Strain and Quantum Confinement on <110> Channel nMOSFET with High-Stress CESL
H. Takashino, T. Okagaki, T. Uchida, T. Hayashi, M. Tanizawa, E. Tsukuda, K. Eikyu, S. Wakahara, K. Ishikawa, O. Tsuchiya, Y. Inoue

26. Analysis of Novel Stress Enhancement Effect Based on Damascene Gate Process with eSiGe S/D for pFETs
S. Yamakawa, J. Wang, Y. Tateshita, K. Nagano, M. Tsukamoto, H. Ohri, N. Nagashima, H. Ansai

27. Nonlinear Piezoresistance Effect in Devices with Stressed Etch Stop Liner
K. H. Bach, R. Liebmann, M. Nawaz, C. Jungemann, E. Ungersboeck

28. 3D Stress, Process and Device Simulation: Extraction of the Relevant Stress Tensor
F. M. Bufler, L. Sponton, R. Gautschi

29. Impact of Two-Step Recessed SiGe S/D Engineering for Advanced pMOSFETs of 32 nm Technology Node and Beyond
N. Kusunoki, N. Yasutake, M. Awano, I. Mizushima, H. Yoshimura, S. Yamada, F. Matsuoka

30. Simulation Study of Multiple FIN FinFET Design for 32nm Technology Node and Beyond
Xinlin Wang, Andres Bryant, Omer Dokumaci, Phil Oldiges, Wilfried Haensch

31. Device Design and Scalability of an Impact Ionization MOS Transistor with an Elevated Impact Ionization Region
Eng-Huat Toh, Grace Huiqi Wang, Lap Chan, Ganesh Samudra, Yee-Chia Yeo

32. A Prototype Wafer Processing TCAD Tool Composed of BMD Simulation Module, Metal Gettering and Thermal Stress/Slip Functions for Scaled Device Design Phase
T. Okada, A. Fathurahman, R. Takeda, H. Banba, H. Kubota, Y. Matsushita, M. Naito, S. Nakamura

33. Compact Modeling of Phase-Change Memories
K. Sonoda, A. Sakai, M. Moniwa, K. Ishikawa, O. Tsuchiya, Y. Inoue

34. Modeling of NBTI Degradation for SiON pMOSFET
J. Shimokawa, T. Enda, N. Aoki, H. Tanimoto, S. Ito, Y. Toyoshima

35. Modeling Study of Ultra-Thin Ge Layers Using Tight-Binding, LCBB and kp Methods
D. Rideau, E. Batail, S. Monfray, C. Tavernier, H. Jaouen

36. Analysis of Silicon Dioxide Interface Transition Region in MOS Structures
S. Markov, N. Barin, C. Fiegna, S. Roy, E. Sangiorgi, A. Asenov

37. Tunneling Properties of MOS Systems Based on High-k Oxides
F. Sacconi, A. Pecchia, M. Povolotskyi, A. Carlo, J. M. Jancu

38. First-Principles Investigation on Oxide Trapping
W. Gös, T. Grasser

39. A Self-Consistent Simulation of InSb Double-Gate MOSFETs Using Full-Band Tight-Binding Approach
Ximeng Guan, Yaohua Tan, Jing Lu, Lilin Tian, Yan Wang, Zhiping Yu

40. Influence of Oxygen Composition and Carbon Impurity on Electronic Reliability of HfO2
K. Suzuki, Y. Ito, H. Miura

41. Upcoming Physics Challenges for Device Modeling
R. Brunetti, E. Piccinini

42. Transient Characterization of Interface Traps in 4H-SiC MOSFETs
S. Potbharel, N. Goldsman, G. Pennington, A. Akturk, A. Lelis

43. Electro-Thermal, Transient, Mixed-Mode 2D Simulation Study of SiC Power Thyristors Operating Under Pulsed-Power Conditions
Leonardo M. Hillkirk, Allen R. Hefner, Robert W. Dutton, Stephen B. Bayne, Heather O’Brien

44. Numerical Design Study on the Optimal p-Emitter Thickness of 4H-SiC Bipolar Diodes
D. Werber, G. Wachutka

45. Study of Time-Periodic Avalanche Breakdown Occurring in VLD Edge Termination Structures
U. Knipper, F. Pfirsch, T. Raker, J. Niedermeyr, G. Wachutka

46. Simulation of Magnetotransport in Hole Inversion Layers Based on Full Subbands
A. T. Pham, C. Jungemann, B. Meinerzhagen

47. Monte Carlo Study on Number of Scattering Events for Quasi-Ballistic Transport in MOSFETs
Y. Ohkura, C. Suzuki

48. Modeling of Macroscopic Transport Parameters in Inversion Layers
M. Vasicek, M. Karner, E. Ungersboeck, M. Wagner, H. Kosina, T. Grasser

49. Study of the Junction Depth Effect on Ballistic Current Using the Subband Decomposition Method
M. Ali. Pourghaderi, Wim Magnus, Bart Sorée, Marc Meuris, Marc Heyns, Kristin Meyer

50. Transport in Silicon Nanowire and Single-Electron Transistors
Toshiro Hiramoto, Kousuke Miyaji, Masaharu Kobayashi

51. Self-Consistent Simulations of Nanowire Transistors Using Atomistic Basis Sets
Neophytos Neophytou, Abhijeet Paul, Mark S. Lundstrom, Gerhard Klimeck

52. Full-Band Atomistic Study of Source-To-Drain Tunneling in Si Nanowire Transistors
M. Luisier, A. Schenk, W. Fichtner

53. Modeling Carbon Nanotube Electron-Phonon Resonances Shows Terahertz Current Oscillations
A. Akturk, N. Goldsman, G. Pennington

54. Crystalline Orientation Effects on Ballistic Hole Current in Ultrathin DG SOI MOSFETs
H. Minari, N. Mori

55. Numerical Simulation of Field Emission in the Surface Conduction Electron-Emitter Display
Hsiang-Yu Lo, Yiming Li, Hsueh-Yung Chao, Chih-Hao Tsai, Fu-Ming Pan, Mei-Chao Chiang, Ting-Chen Kuo, Chi-Neng Mo

56. Microscopic Modelling of Quantum Well Solar Cells
U. Aeberhard, R. Morf

57. Monte Carlo Simulation of Time-Dependent Operation of Quantum Cascade Lasers
J -L. Thobel, O. Bonno, F. Dessenne

58. Multiscale Simulation of Electronic and Optoelectronic Devices with TiberCAD
M. Maur, M. Povolotskyi, F. Sacconi, G. Romano, E. Petrolati, A. Carlo

59. Hopping Transport of Electrons via Si-Dot
H. Watanabe

60. Simulation of Spin Transport Properties in Schottky Barrier FET Using Monte Carlo Method
Jianhua Liu, Gang Du, Ji Cao, Zhiliang Xia, Yi Wang, Ruqi Han, Xiaoyan Liu

61. Discontinuous Galerkin Solver for the Semiconductor Boltzmann Equation
Yingda Cheng, Irene M. Gamba, Armando Majorana, Chi-Wang Shu

62. Modeling of Shock Waves in Two-Dimensional Electron Channels: Effect of Tsunami
I. Semenikhin, E. Vostrikova, A. Ivanov, V. Ryzhii

63. Simulation of Lag and Current Slump in AlGaN/GaN HEMTs as Affected by Buffer Trapping
A. Nakajima, K. Itagaki, K. Horio

64. Electrothermal Monte Carlo Study of Charge Confinement in GaN HFETs
T. Sadi, R. W. Kelsall

65. Hydrodynamic Modeling of AlGaN/GaN HEMTs
S. Vitanov, V. Palankovski, S. Murad, T. Rödle, R. Quay, S. Selberherr

66. Simulation of AlGaN/GaN HEMTs’ Breakdown Voltage Enhancement Using Grating Field Plates
E. Bahat-Treidel, V. Sidorov, J. Würfl, G. Tränkle

67. Modelling of Hot Electron Effects in GaN/AlGaN HEMT with AlN Interlayer
A. Brannick, N. A. Zakhleniuk, B. K. Ridley, L. F. Eastman, J. R. Shealy, W. J. Schaff

68. Compact Modeling for New Transistor Structures
C. Hu, M. Dunga, C -H. Lin, D. Lu, A. Niknejad

69. Compact Double-Gate MOSFET Model Correctly Predicting Volume-Inversion Effects
N. Sadachika, H. Oka, R. Tanabe, T. Murakami, H. J. Mattausch, M. Miura-Mattausch

70. Modeling NAND Flash Memories for Circuit Simulations
L. Larcher, A. Padovani, P. Pavan, I. Rimmaudo, A. Calderoni, G. Molteni, F. Gattel, P. Fantini

71. Surface-Potential-Based Compact Model for Quantum Effects in Planar and Double-Gate MOSFET
A. Yu. Serov, S. -M. Hong, Y. J. Park, H. S. Min

72. Statistical Compact Model Parameter Extraction Strategy for Intrinsic Parameter Fluctuation
B. Cheng, S. Roy, A. Asenov

73. Calibrated Hydrodynamic Simulation of Deeply-Scaled Well-Tempered Nanowire Field Effect Transistors
O. M. Nayfeh, D. A. Antoniadis

74. The Effect of Optical Phonon Scattering on the On-Current and Gate Delay Time of CNT-FETs
M. Pourfath, H. Kosina

75. Monte Carlo Modeling of Schottky Contacts on Semiconducting Carbon Nanotubes
H. -Nha Nguyen, H. d’Honincthun, C. Chapus, A. Bournel, S. Galdin-Retailleau, P. Dollfus, N. Locatelli

76. Box Method for the Convection-Diffusion Equation Based on Exponential Shape Functions
Hans Kosina, Oliver Triebl, Tibor Grasser

77. A Simplified Quantum Mechanical Model for the Electron Distribution in a Si Nanowire
W. Magnus, B. Sorée, G. Pourtois, S. Compernolle

78. Efficient Green’s Function Algorithms for Atomistic Modeling of Si Nanowire FETs
A. Pecchia, G. Penazzi, A. Carlo

79. Influence of Uniaxial [110] Stress on the Silicon Conduction Band Structure: Stress Dependence of the Nonparabolicity Parameter
V. A. Sverdlov, G. Karlowatz, E. Ungersboeck, H. Kosina

80. Maxwell Equations on Unstructured Grids Using Finite-Integration Methods
W. J. Schoenmaker, P. Meuris, E. Janssens, K.-J. Kolk, N. Meijs, W. H. A. Schilders

81. Adaptive Time Discretization for a Transient Quantum Drift-Diffusion Model
T. Shimada, S. Odanaka

82. MDS — A New, Highly Extensible Device Simulator
T. D. Linton, K. Foley, F. Heinz, R. Kotlyar, P. Matagne, A. Eremenko, S. Sergienko, M. Stettler, M. D. Giles, B. Voinov

83. Influence of the Poole-Frenkel Effect on Programming and Erasing in Charge Trapping Memories
Yunchen Song, Gang Du, Jinfeng Yang, Rui Jin, Ruqi Han, Keun-Ho Lee, Xiaoyan Liu

84. On the Magnetic Field Extraction for On-Chip Inductance Calculation
A. Nentchev, S. Selberherr

85. EMC Simulation of THz Emission from Semiconductor Devices
V. M. Polyakov, F. Schwierz

86. Enhanced Band-to-Band Tunneling-Induced-Hot-Electron Injection in P-Channel Flash by SiGe Channel and HfO2 Tunnel Dielectric
Chi-Chao Wang, Kuei-Shu Chang-Liao, Chun-Yuan Lu, Tien-Ko Wang

87. Challenges in 3D Process Simulation for Advanced Technology Understanding
S. M. Cea, A. Eremenko, P. Fleischmann, M. D. Giles, S. Halama, F. O. Heinz, A. N. Ivanov, P. H. Keys, A. D. Lilak

88. Characteristic Fluctuation Dependence on Discrete Dopant for 16nm SOI FinFETs at Different Temperature
Yiming Li, Chih-Hong Hwang, Shao-Ming Yu, Hsuan-Ming Huang, Ta-Ching Yeh, Hui-Wen Cheng, Hung-Ming Chen, Jiunn-Ren Hwang, Fu-Liang Yang

89. Hot-Carrier Behaviour of a 0.35 µm High-Voltage n-Channel LDMOS Transistor
J. M. Park, H. Enichlmair, R. Minixhofer

90. Dynamic Monte Carlo Simulation of an Amorphous Organic Device
Gregor Meller, Ling Li, Stefan Holzer, Hans Kosina

91. Charge Injection Model in Organic Light-Emitting Diodes Based on a Master Equation
Ling Li, Gregor Meller, Hans Kosina

92. Simulation of Analog/RF Performance and Process Variation in Nanowire Transistors
Runsheng Wang, Jing Zhuge, Ru Huang

93. Analysis of Process-Geometry Modulations through 3D TCAD
L. Sponton, L. Bomholt, W. Fichtner

94. Asymmetrical Triple-Gate FET
Meng-Hsueh Chiang, Jeng-Nan Lin, Keunwoo Kim, Ching-Te Chuang

95. Process Variation-A ware Estimation of Static Leakage Power in Nano CMOS
B. P. Harish, Navakanta Bhat, Mahesh B. Patil

96. The Optimization of Low Power Operation SRAM Circuit for 32nm Node
R. Tanabe, H. Anzai, Y. Ashizawa, H. Oka

97. Device Design Evaluation of Multigate FETs Using Full 3D Process and Device TCAD Simulation
Muhammad Nawaz, Stefan Decker, Luis-Felipe Giles, Wolfgang Molzer, Thomas Schulz, Klaus Schrüfer, Reinhard Mahnkopf

98. Modeling and Extraction of Effective Lateral Doping Profile Using the Relation of On-Resistance vs. Overlap Capacitance in (100) and (110)-Oriented MOSFETs
Seong-Dong Kim, Bin (Frank) Yang, Shreesh Narasimha, Andrew Waite, Karen Nummy, Linda Black, Haizhou Yin, Scott Luning

99. Molecular Orbital Examination of Negative-Bias Temperature Instability Mechanism
T. Maruizumi, J. Ushio, Y. Shiraki

100. Process Margin Analysis and Yield Enhancement Through Statistical Topography Simulation
Kyu-Baik Chang, Won-Young Chung, Sung-Jin Kim, Young-Min Ko, Jong-Joo Jang, Tai-Kyung Kim, Jin-Kyu Park, Young-Kwan Park, Moon-Hyun Yoo

101. Efficient Coupling of Monte Carlo and Level Set Methods for Topography Simulation
O. Ertl, C. Heitzinger, S. Selberherr

102. Strained Contact Etch Stop Layer Integration: Geometry Design Impact
C. Populaire, D. Villanueva, S. Orain, H. Brillet-Rouxel

103. Modeling of Deposition During C5F8/CO/O2/Ar Plasma Etching Using Topography and Composition Simulation
T. Ichikawa, T. Takase, N. Tamaoki

104. Ab Initio Calculations of the Transport Through Single Molecules and Carbon Nanotubes
Kenji Hirose, Nobuhiko Kobayashi, Hiroyuki Ishii

105. Three-Dimensional Sacrificial Etching
Johann Cervenka, Hajdin Ceric, Otmar Ertl, Siegfried Selberherr

106. Atomistic study of Metal/High-K interface
Pierre-Yves Prodhomme, Philippe Blaise, Fabien Fontaine-Vive, Jacky Even, Marius Orlowski

107. Ab-Initio Calculations of Indium Migration in Uniaxial Strained Silicon
Young-Kyu Kim, Soon-Yeol Park, Taeyoung Won

108. Noise Simulation of Nanoscale Devices Based on the Non-Equilibrium Green’s Function Formalism
Hong-Hyun Park, Sung-Min Hong, Seonghoon Jin, Hong Shick Min, Young June Park

109. RDF Analysis of Small-Signal Equivalent Circuit Parameters in MOSFET Devices
L. Oniciuc, P. Andrei

Keywords: Engineering, Electronics and Microelectronics, Instrumentation, Optical and Electronic Materials, Nanotechnology, Numerical and Computational Methods in Engineering, Simulation and Modeling