Computing with Memory for Energy-Efficient Robust Systems

Part I. Introduction

1. Challenges in Computing for Nanoscale Technologies
Somnath Paul, Swarup Bhunia

2. A Survey of Computing Architectures
Somnath Paul, Swarup Bhunia

3. Motivation for a Memory-Based Computing Hardware
Somnath Paul, Swarup Bhunia

Part II. Memory Based Computing: Overview

4. Key Features of Memory-Based Computing
Somnath Paul, Swarup Bhunia

5. Overview of Hardware and Software Architectures
Somnath Paul, Swarup Bhunia

6. Application of Memory-Based Computing
Somnath Paul, Swarup Bhunia

Part III. Hardware Framework

7. A Memory Based Generic Reconfigurable Framework
Somnath Paul, Swarup Bhunia

8. MAHA Hardware Architecture
Somnath Paul, Swarup Bhunia

Part IV. Software Framework

9. Application Analysis
Somnath Paul, Swarup Bhunia

10. Application Mapping to MBC Hardware
Somnath Paul, Swarup Bhunia

Part V. MBC Design Space Exploration

11. Design Space Exploration for MBC Based Generic Reconfigurable Computing Framework
Somnath Paul, Swarup Bhunia

12. Design Space Exploration for MAHA Framework
Somnath Paul, Swarup Bhunia

13. Preferential Memory Design for MBC Frameworks
Somnath Paul, Swarup Bhunia

14. PLA Based Application Mapping in MBC
Somnath Paul, Swarup Bhunia

Part VI. Off-Chip Hardware Acceleration Using MBC

15. Background and Motivation
Somnath Paul, Swarup Bhunia

16. Off-Chip MAHA Using NAND Flash Technology
Somnath Paul, Swarup Bhunia

17. Improvement in Energy-Efficiency with Off-Chip MAHA
Somnath Paul, Swarup Bhunia

Part VII. Improving Reliability of Operations in MBC

18. Mitigating the Effect of Parametric Failures in MBC Frameworks
Somnath Paul, Swarup Bhunia

19. Mitigating the Effect of Runtime-Failures in MBC Frameworks
Somnath Paul, Swarup Bhunia

20. Summary
Somnath Paul, Swarup Bhunia

Keywords: Engineering, Circuits and Systems, Electronics and Microelectronics, Instrumentation, Processor Architectures