Embedded Systems Specification and Design Languages

I.C/C++ Based System Design

1. How Different Are Esterel and SystemC
Jens Brandt, Klaus Schneider

2. Timed Asynchronous Circuits Modeling and Validation Using SystemC
Cédric Koch-Hofer, Marc Renaudin

3. On Construction of Cycle Approximate Bus TLMs
Martin Radetzki, Rauf Salimi Khaligh

4. Combinatorial Dependencies in Transaction Level Models
Robert Guenzel, Wolfgang Klingauf, James Aldis

5. An Integrated SystemC Debugging Environment
Frank Rogin, Christian Genz, Rolf Drechsler, Steffen Rülke

6. Measuring the Quality of a SystemC Testbench by Using Code Coverage Techniques
Daniel Große, Hernan Peraza, Wolfgang Klingauf, Rolf Drechsler

7. SystemC-Based Simulation of the MICAS Architecture
Dragos Truscan, Kim Sandström, Johan Lilius, Ivan Porres

II.Analog, Mixed-Signal, and Heterogeneous System Design

8. Heterogeneous Specification with HetSC and SystemC-AMS: Widening the Support of MoCs in SystemC
F. Herrera, E. Villar, C. Grimm, M. Damm, J. Haase

9. An Extension to VHDL-AMS for AMS Systems with Partial Differential Equations
Leran Wang, Chenxu Zhao, Tom J. Kazmierski

10. Mixed-Level Modeling Using Configurable MOS Transistor Models
Jürgen Weber, Andreas Lemke, Andreas Lehmler, Mario Anton, Sorin A. Huss

III.UML-Based System Specification and Design

11. Modeling AADL Data Communications with UML MARTE
Charles André, Frédéric Mallet, Robert Simone

12. Software Real-Time Resource Modeling
Frédéric Thomas, Sébastien Gérard, Jérôme Delatour, François Terrier

13. Model Transformations from a Data Parallel Formalism Towards Synchronous Languages
Huafeng Yu, Abdoulaye Gamatié, Eric Rutten, Jean-Luc Dekeyser

14. UML and SystemC – A Comparison and Mapping Rules for Automatic Code Generation
Per Andersson, Martin Höst

15. An Enhanced SystemC UML Profile for Modeling at Transaction-Level
S. Bocchio, E. Riccobene, A. Rosti, P. Scandurra

16. SC2 StateCharts to SystemC: Automatic Executable Models Generation
Marcello Mura, Marco Paolieri

IV.Formalisms for Property-Driven Design

17. Asynchronous On-Line Monitoring of Logical and Temporal Assertions
K. Morin-Allory, L. Fesquet, B. Roustan, D. Borrione

18. Transactor-Based Formal Verification of Real-Time Embedded Systems
D. Karlsson, P. Eles, Z. Peng

19. A Case-Study in Property-Based Synthesis: Generating a Cache Controller from a Property-Set
Martin Schickel, Martin Oberkönig, Martin Schweikert, Hans Eveking

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Keywords: TECHNOLOGY & ENGINEERING / General TEC000000