Power Distribution Networks with On-Chip Decoupling Capacitors

1. Introduction
2. Inductive Properties of Electric Circuits
3. Properties of On-Chip Inductive Current Loops
4. Electromigration
5. High Performance Power Distribution Systems
6. Decoupling Capacitance
7. On-Chip Power Distribution Networks
8. Computer-Aided Design and Analysis
9. Inductive Properties of On-Chip Power Distribution Grids
10. Variation of Grid Inductance with Frequency
11. Inductance/Area/Resistance Tradeoffs
12. Scaling Trends of On-Chip Power Distribution Noise
13. Impedance Characteristics of Multi-Layer Grids
14. Multiple On-Chip Power Supply Systems
15. On-Chip Power Distribution Grids with Multiple Supply Voltages
16. Decoupling Capacitors for Multi-Voltage Power Distribution Systems
17. On-chip Power Noise Reduction Techniques in High Performance ICs
18. Effective Radii of On-Chip Decoupling Capacitors
19. Efficient Placement of Distributed On-Chip Decoupling Capacitors
20. Impedance/Noise Issues in On-Chip Power Distribution Networks
21. Conclusions

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Keywords: TECHNOLOGY & ENGINEERING / General TEC000000