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Sachdev, Manoj

Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits

Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits

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ISBN: 9780387465470
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Table of contents

1. Introduction
Manoj Sachdev, José Pineda de Gyvez

2. Functional and Parametric Defect Models
Manoj Sachdev, José Pineda de Gyvez

3. Digital CMOS Fault Modeling
Manoj Sachdev, José Pineda de Gyvez

4. Defects in Logic Circuits and their Test Implications
Manoj Sachdev, José Pineda de Gyvez

5. Testing Defects and Parametric Variations in RAMs
Manoj Sachdev, José Pineda de Gyvez

6. Defect-Oriented Analog Testing
Manoj Sachdev, José Pineda de Gyvez

7. Yield Engineering
Manoj Sachdev, José Pineda de Gyvez

8. Conclusion
Manoj Sachdev, José Pineda de Gyvez

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Keywords: TECHNOLOGY & ENGINEERING / General TEC000000

Author(s)
 
Publisher
Springer
Publication year
2007
Language
en
Edition
1
Category
Technology, Energy, Traffic
Format
Ebook
eISBN (PDF)
9780387465470

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